nanoFIP Test Board News
nanoFIP Test Board
12-04-2011: 20 V2 cards received
20 NFTC boards pre-validated at HLP have been received and are now being tested
nanoFIP Test Board
21-03-2011: V2 prototype validated
Two V2 test boards were received by HLP on Tuesday 15th March. HLP validated them and shipped one board to CERN; it was received on Friday March 18th. At CERN the test board has been tested in memory loopback mode, 124 bytes, 5ms macrocycle and has performed more than 42.
nanoFIP Test Board
08-03-2011: 20 test boards ordered
Twenty NanoFIP test boards are ordered. These boards will be an improved version of the prototype that is working since July 2010. This version has more test points and can also be used to test the foreseen JTAG programming extension of the NanoFIP.
nanoFIP Test Board
28-09-2010: Production and consumption of variables working
The production and consumption of variables is working and has been tested for over two days. The data is not yet checked continuously, we’re waiting for an extension of the firmware of the NanoFIP test board that allows the NanoFIP to resend the data it has received.
nanoFIP Test Board
30-08-2010: Presence and id variables read
See http://lists.ohwr.org/sympa/arc/nanofip-test-board/2010-08/msg00000.html
nanoFIP Test Board
22-07-2010: Test board validated
The test board and the software has been validated. It is now ready to accept the first version of the NanoFIP code to start testing the WorldFIP functionality.
nanoFIP Test Board
01-07-2010: steady progress
The assembly of the boards started and the firmware development is progressing. A Draft software manual is available with screenshots that give a good impression of the look-and-feel.
nanoFIP Test Board
10-06-2010: PCB layout OK. Prototype building starts.
The PCB layout has been verified and is OK. The PCB boards and all components are ordered and will arrive end of June at the company. As next step the firmware will be written.
nanoFIP Test Board
25-05-2010: New PCB layout received
We received a new layout that should include changes requested after the PCB layout review. It will be verified before launching the production of the prototypes.