FMC DEL 1ns 4cha News
FMC DEL 1ns 4cha
Hardware and VHDL design notes published
An engineer-to-engineer note describing the hardware and VHDL design of the Fine Delay has been published. It provides a lot of information on the internals of the FD card, calibration techniques, White Rabbit implementation, Acam’s TDC and programming the card’s registers.
FMC DEL 1ns 4cha
09-01-2013: 70 Fine Delay FMC cards shipped
INCAA Computers in the Netherlands has produced and tested seventy Fine Delay FMC cards. These cards have a resolution better than 1 ns.
FMC DEL 1ns 4cha
15 V3 boards built
A small series of the Fine Delay module board has been built to be used in tests for CNGS to help in measuring precisely the speed of neutrinos. One board will be reserved to be used in a prototype setup for the LHC kicker magnets.
FMC DEL 1ns 4cha
02-03-2012: review of V4 held
A schematics and PCB review had been held for the V4 of the fine delay FMC module. During the review we made suggestions that improve the reliability of the board and will make it more safe to use when no terminations are used on the output signals.
FMC DEL 1ns 4cha
02-09-2011: V2 works
The just-arrived V2 prototype was confirmed to work with the new VHDL firmware on a SPEC card. See Measurements for details.
FMC DEL 1ns 4cha
31-08-2011: Received V2 boards
We received assembled prototypes of V2 of the fine delay module. The firmware for the Fine delay module on a SPEC card is being developed and should be ready for demonstration in around two weeks time.
FMC DEL 1ns 4cha
18-03-2011: Production files V1 ready
CERN’s design office reviewed the PCB layout and generated the production files that are in the same format as over 2000 other CERN designs.
FMC DEL 1ns 4cha
03-02-2011: PCB assembled and powered up
One prototype PCB has been assembled in our lab and immediately powered up. All power supplies are correct and the board’s I2C peripherals respond.
FMC DEL 1ns 4cha
18-01-2011: PCB layout received for review.
The PCB layout has been received for review. It will be reviewed within a day and then quickly three prototypes will be built. In parallel the design will be reviewed by CERN’s design office and complete production files will be generated so that the design will be easier to be built by industry.