Projects
Compact Universal Timing Endpoint based on White Rabbit
The Cute-WR project aims to build a self-contained White Rabbit Node implementation on a FPGA Mezzanine Card
Compact Universal Timing Endpoint Based on White Rabbit with Artix7 - Cute-WR-A7
The Cute-WR-A7 is the enhanced version of the CUTE-WR-DP with an Xilinx Artix7 series FPGA
Compact Universal Timing Endpoint Based on White Rabbit with Dual Ports Cute-WR-DP
The project is obsolete, a similar project Cute-WR-A7 replaces the old Spartan-6 FPGA with Artix 7 family
CompactRIO White Rabbit CRIO-WR
CRIO-WR is a standalone White Rabbit node implementation on a PCB with a form factor for National Instruments CompactRIO modules
Companies
The following companies are actively using the OHR site to develop or produce open hardware, software and drivers
Conv TTL Blocking
The TTL to blocking converter is a system designed to replicate TTL and blocking pulses