OPT-ADC-10k-32b-1cha HPM7177

The OPT ADC 10k 32b 1cha is a single channel 10kSPS 32 bit ADC card in the format defined by the CERN TE-EPC group for use with the Function Generator Controller (FGC 3.2) . It is also known under the name HPM7177. The device is a metrology-grade ADC for the highest accuracy class in the HL-LHC accelerator. CERN will need over a hundred.

The design is based on a commercial ADC, the Analog Device AD7177-2. It is a standalone unit that interfaces through an optical fibre for the read-out and synchronization. The target analog signal bandwidth is 2000 Hz, and the main design objectives are very low 1/f noise and excellent short-term stability and accuracy with an effective resolution over 23 bits for a bandwidth below 10 Hz.

In the second half of 2019 several prototypes were produced and tested. Based on this feedback, a revised version (V2) was prepared in 2020. In 2022 a full metrological characterization of the device was carried out. A commercial contract for the production of more than 100 units was signed in 2022, and the first units were delivered in 2023.

A block diagram of the device is available here

Left: Fully assembled device Right: Open unit with ADC mezzanine removed Other images: Bottom side of the ADC mezzanine board - Test setup with 4 units in a climatic chamber

Contact

Javier Serrano