HiCCE-FMC-128
The second prototype of the HiCCE project.
In the second version of the HiCCE-FMC-128 module, digital resistors used in the first prototype module to control the upper and lower limit of the bandpass filter on the Intan RHA2132 frontend chips were removed. The bandwidth was fixed to 1.0 Hz – 20 kHz.
We tested HiCCE-FMC-128 version 2 using a commercial low-cost FMC carrier based on a modern hybrid Zynq-7000 SoC device that integrates an FPGA fabric along with a dual-core 32-bits processor (ARM Cortex).
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The Second prototype was tested.
We successfully tested the HiCCE-FMC-128 version 2 using a commercial low-cost FMC carrier, Avnet ZedBoard.
Alpha board is mostly working.
It looks like the alpha_0 is (mostly) working. Still ironing a few kinks. Andres and Maria Liz have carried out electrical tests on Sanjee’s alpha board, and have written stub FPGA code that allows to read from any channel.
It looks like we have boards.
After a little bit of a struggle, due to the digital potentiometers being shipped in a different package than was designed, we now appear to have boards. I will be seeing Sanjee next week to check things out.