The FMC DEL 1ns 2cha pulse delay module provides two TTL pulse-outputs with independently adjustable delay and pulse width. Pulses are triggered by a common TTL input with adjustable threshold.

The timing is synchronized either to an external reference clock or an internal 125 MHz VCXO (white rabbit compatible). Delay and pulse width can be fine-adjusted with a resolution of 10 ps.

Signal paths have been optimized for low jitter and high frequency pulse repetition rates.

The card has been designed for generating a periodic gating signal for the LHC Schottky Monitor at CERN. In this application it uses the LHC RF frequency (400.789 MHz) as an input clock and revolution frequency (11.245 kHz) as a trigger. In each turn it can be programmed to generate a pulse to enable a HMC547 fast gate in any of the 3564 bunch slots. The pulse width and delay can be adjusted to optimise the measurement. The two output channels provide independent gating of the horizontal and vertical systems of a single LHC beam.

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