News
RHINO
Borph/Linux
We have finally finish setting to work the full Rhino board with a port of Borph Linux. BORPH is an operating system designed for FPGA-based reconfigurable computers, implemented as an extension of the Linux kernel.
FMC ADC 100M 14b 4cha
25-03-2011: ADC card usable for radio telescopes?
The Oregan State University (OSU) refers to the Open ADC design on their Radio Telescope website. The aim of OSU’s project is to build a small radio telescope for use in the 1 to 2 GHz range which can be used to make RF maps of interesting celestial objects and provide observational images in real time on a web site.
FMC DEL 1ns 4cha
18-03-2011: Production files V1 ready
CERN’s design office reviewed the PCB layout and generated the production files that are in the same format as over 2000 other CERN designs.
nanoFIP Test Board
21-03-2011: V2 prototype validated
Two V2 test boards were received by HLP on Tuesday 15th March. HLP validated them and shipped one board to CERN; it was received on Friday March 18th. At CERN the test board has been tested in memory loopback mode, 124 bytes, 5ms macrocycle and has performed more than 42.
FMC TDC 1ns 5cha
18-03-2011: Schematics design review held
After a first global schematics review in the week before, a second schematics design review was held with five engineers who found a few details that will improve the functioning and the documentation of the schematics.
Gennum GN4124 core
CERN's PFC card on Gennum's blog
CERN’s PFC card and the Gennum to Wishbone core is featured on Gennum’s GN4124 Design blog (link no longer available)
nanoFIP Test Board
08-03-2011: 20 test boards ordered
Twenty NanoFIP test boards are ordered. These boards will be an improved version of the prototype that is working since July 2010. This version has more test points and can also be used to test the foreseen JTAG programming extension of the NanoFIP.
CernFIP
11-03-2011: Playing with the tools!
We are currently working on the synthesis and PnR of nanoFIP, checking on both Synplify and Precision Rad-Tol.
EtherBone Core
Etherbone/FEC demo layout
FEC is a complete standalone encoder/decoder block which can be bypassed Etherbone core will only support Wishbone slaves, not masters. Remote EB Mastre will be in software on intel based PC with a GUI