News

Simple PCIe FMC carrier SPEC

03-07-2012: Delivery of 52 SPEC boards

It’s getting serious now as we received at CERN four boxes with in total 52 SPEC boards from the company Seven Solutions. All boards are individually packed and have an LHC barcode on it that will ease us entering the cards in our equipment database.
These boards will be used together with ADC, Fine Delay and digital I/O mezzanines, often in combination with firmware supporting White Rabbit and therefore giving precise time stamping of data.

Simple PCIe FMC carrier SPEC

12-06-2012: SPEC passes EMC tests

The SPEC board together with a 5 channel Digital I/O card have passed the most restrictive EMC tests of each class (domestic and industrial) successfully:

  • EM Radiated Emission: Class B (Domestic) EN 55022 (2006) / A1 (2007)
  • EM Immunity (Industrial): EN 61000-4-3 (2006) / A1 (2008) / A2 (2010), EN 61000-4-4 (2004) / A1 (2010) / Corr (2010), EN 61000-4-6 (2009), EN
    61000-4-2 (2009), EN 61000-4-8 (2010).

The test report is publicly available.

FMC DAC 250M 16b 4cha

Hardware V2 finished

Version 2 of the hardware finished. Added HW V2 data to the repository and the new images to the wiki page. Tests will be started in the mid June..

FMC DAC 250M 16b 4cha

Started to use OHR

Updated the project wiki page with version 1 and 2 block diagrams, images, specifications, project description and status. More updates coming soon regarding the project…

Simple PCIe FMC carrier SPEC

25-04-2012: SPEC boards running in Siberia!

First field tests of two SPEC boards running a White Rabbit timing link between them have been made in Siberia. These tests are made by DESY to verify the usability of the board at the Gamma-Ray and Cosmic-Ray experiment HiSCORE-EA at the Tunka site. Full results of the tests will be made available soon. Two kilometres of fibre where outside, while the SPEC boards were nicely warm inside the counting room.

FMC DEL 1ns 4cha

15 V3 boards built

A small series of the Fine Delay module board has been built to be used in tests for CNGS to help in measuring precisely the speed of neutrinos. One board will be reserved to be used in a prototype setup for the LHC kicker magnets. It was V3 that has been built, V4 will have a slightly different output stage.

FMC DEL 1ns 4cha

02-03-2012: review of V4 held

A schematics and PCB review had been held for the V4 of the fine delay FMC module. During the review we made suggestions that improve the reliability of the board and will make it more safe to use when no terminations are used on the output signals. Once the modifications are made, CERN will order 40 boards.

FMC TDC 1ns 5cha

02-02-2012: V2 design ready

Based on the experience with the V1 prototype, nine Issues were found. Corrections have been made to the schematics and PCB layout and these will be reviewed on 7 February. After this CERN’s design office will generate the final production files.
The firmware VHDL code is under thorough review and production test software has to be written. This work should be ready by the end of the summer.

Simple VME FMC Carrier SVEC

Schematics review held

Three months after CERN placed the order for the design, we received the schematics for the Simple VME FMC Carrier (SVEC). One week later the first design review came up with suggestions to make the design even simpler and more compatible to the SPEC design that it should follow as closely as possible. The compatibility will make that firmware developed for the SPEC will be easy to port to the SVEC.