The CONV-TTL-BLO gateware now uses the converter board common gateware as a sub-module and implements external logic to adapt for levels needed by this module.

These are the differences from the previous version:

• CHANGES IN MEMORY MAP
  • the Multiboot module is now at address 0x100
  • the one-wire master module is now at address 0x200
• addition of per-channel latest timestamp registers
• addition of line status register
• implementation of PMISSE bits for each channel in the SR

See more information here.