Five CERN engineers have spent in total over nine days of work to review the VHDL code of the NanoFIP design. The total code of the design amounts to 10750 lines (including extensive comments and empty lines) in thirty files. During the review suggestions were made that make the design more robust to possible glitches on the cable and that make it less prone to block under extreme cases that may occur because of radiation or use that is outside of the specifications. The implementation of the suggested improvements will result in a more robust design that is now understood by several engineers. It has to be noted that the design already has been used in working hardware and that extensive simulations have been made. Regression tests will be made after the code changes triggered by the review.